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Delay-locked Loop: an adaptive timing alignment
Blekinge Institute of Technology, Department of Signal Processing.
Blekinge Institute of Technology, Department of Signal Processing.
1996 (English)Independent thesis Advanced level (degree of Master (One Year))Student thesis
Abstract [en]

Conventional approches to the problem of extracting a clock from the data do not automatically hold the clock in the center of the data-eye. This thesis describes a data feedback technique that adjusts the clock and significantly reduces timing uncertainty by compensating for initial ciruit misalignment, propagation delay variations and low-frequency jitter. The purpose of this thesis is to investigate the characteristics of the technique with different phase detectors by analysis, simultations and experimentally work.

Place, publisher, year, edition, pages
1996. , 53 p.
Keyword [en]
Delay-locked loop, adaptive timing
National Category
Signal Processing
Identifiers
URN: urn:nbn:se:bth-4516Local ID: oai:bth.se:arkivexC125660F002EA348C12568A3002CAA98OAI: oai:DiVA.org:bth-4516DiVA: diva2:831859
Uppsok
Technology
Supervisors
Available from: 2015-04-22 Created: 2000-03-15 Last updated: 2015-06-30Bibliographically approved

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